SVM Technique for Three-Phase Two-Level Inverter With Common Mode Voltage Spikes and Total Number of Switching Reduction
Published online: 09/10/2025
Corressponding author's email:
tridd@hcmute.edu.vnDOI:
https://doi.org/10.54644/jte.2025.1998Keywords:
Three-phase inverter, Space vector modulation, Common-mode voltage, Pulse width modulation, Leakage currentAbstract
Three-phase two-level voltage source inverters play an important role in converting DC to AC, but the switching process generates common mode voltage (CMV), which leads to leakage current, shaft voltage, and electromagnetic interference. The AZSPWM, RSPWM, and NSPWM methods effectively reduce CMV, but still have disadvantages such as high switching times, large harmonics, or limited modulation range. A particularly important problem is the appearance of CMV spikes, which often occur due to dead-time during switching of semiconductor switches and inter-sector switching, causing sudden increases in common mode voltage and degrading the output voltage quality. This paper proposes an improved SVPWM algorithm that synthesizes zero vectors using pairs of opposing vectors, flexibly by sector. This method not only reduces CMV spikes but also reduces the total number of switching times by eliminating switching during sector switching and optimizing the distribution of PWM pulses. Experimental results show that the proposed algorithm significantly reduces the amplitude and THD of CMV, limits spikes, improves the quality of output voltage, reduces switching loss, and maintains the stability and reliability of the system.
Downloads: 0
References
X. Xu, C. Hao, M. Bishop, M. J. S. Edmonds, J. Sember, and J. Zhang, “Development and planning of solar power in China,” in Proc. IEEE Power & Energy Society General Meeting, 2013, pp. 1–5. DOI: https://doi.org/10.1109/PESMG.2013.6672066
S. Garroum, “How solar got cheap,” Climate Drift, Aug. 2023.
H. A. Rub, J. Holtz, J. Rodriguez, and G. Baoming, “Medium-voltage multilevel converters—state of the art, challenges, and requirements in industrial applications,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2581–2596, Aug. 2010. DOI: https://doi.org/10.1109/TIE.2010.2043039
M. Quraan, P. Tricoli, S. D’Arco, and L. Piegari, “Efficiency assessment of modular multilevel converters for battery electric vehicles,” IEEE Trans. Power Electron., vol. 32, no. 3, pp. 2041–2051, Mar. 2017. DOI: https://doi.org/10.1109/TPEL.2016.2557579
E. Rasool and M. Darwish, “High frequency inverter circuit for UPS systems,” in Proc. Int. Universities Power Engineering Conf. (UPEC), Sep. 2012, pp. 1–4. DOI: https://doi.org/10.1109/UPEC.2012.6398602
D. T. Do, N. A. Truong, M. K. Nguyen, and T. D. Duong, “Highly-reliable switched-boost four-leg inverter with leakage current suppression,” IEEE Access, vol. 12, pp. 137054–137062, Sep. 2024, doi: 10.1109/ACCESS.2024.3463719. DOI: https://doi.org/10.1109/ACCESS.2024.3463719
D. T. Do, H. M. Le, T. L. Nguyen, and V. T. Tran, “An SVM method for three-phase quasi-switched boost inverter to eliminate leakage current,” J. Tech. Educ. Sci., vol. 20, no. 2, pp. 34–44, 2025, doi: 10.54644/jte.2025.1562. DOI: https://doi.org/10.54644/jte.2025.1562
R. P. Alzola et al., “Robust active damping in LCL-filter based medium-voltage parallel grid inverters for wind turbines,” IEEE Trans. Power Electron., vol. 33, no. 12, pp. 10846–10857, Dec. 2018. DOI: https://doi.org/10.1109/TPEL.2018.2801126
D. T. Do, M. K. Nguyen, V. T. Ngo, T. H. Quach, and V. T. Tran, “Common mode voltage elimination for quasi-switch boost T-type inverter based on SVM technique,” Electronics, vol. 9, no. 1, pp. 1–16, 2020. DOI: https://doi.org/10.3390/electronics9010076
H. Chen and H. Zhao, “Review on pulse-width modulation strategies for common-mode voltage reduction in three-phase voltage-source inverters,” IET Power Electron., May 2016, ISSN 1755-4535. DOI: https://doi.org/10.1049/iet-pel.2015.1019
L. Helle, Modeling and Comparison of Power Converters for Doubly Fed Induction Generators in Wind Turbines. Ph.D. dissertation, Inst. Energy Technol., Aalborg Univ., Denmark.
V. N. Nho and M. J. Youn, “A single carrier multi-modulation method in multilevel inverters,” J. Power Electron., vol. 5, no. 1, pp. 65–72, Jan. 2005.
D. O. Neacsu, “Space Vector Modulation — An Introduction,” Tutorial at IECON 2001, in Proceedings of the 27th Annual Conference of the IEEE Industrial Electronics Society, Denver, CO, USA, 2001, pp. 1583–1592.
N. V. Nho, H. H. Lee, and N. H. Khuong, “Sinusoidal based step pulse PWM method in cascade multilevel inverters,” in Proc. IEEE, 2006. DOI: https://doi.org/10.1109/IFOST.2006.312319
G. Oriti, A. L. Julian, and T. A. Lipo, “A new space vector modulation strategy for common mode voltage reduction,” in Proc. IEEE Annu. Power Electron. Spec. Conf. (PESC), Jul. 1997, doi: 10.1109/PESC.1997.618066. DOI: https://doi.org/10.1109/PESC.1997.618066
M. Cacciato, A. Consoli, and G. Scarcella, “Reduction of common-mode currents in PWM inverter motor drives,” IEEE Trans. Ind. Appl., vol. 35, no. 2, pp. 469–476, Mar./Apr. 1999. DOI: https://doi.org/10.1109/28.753643
S. M. Ali, V. V. Reddy, and M. S. Kalavathi, "Simplified active zero state PWM algorithms for vector controlled induction motor drives for reduced common mode voltage," International Conference on Recent Advances and Innovations in Engineering (ICRAIE-2014), Jaipur, India, 2014, pp. 1-7, doi: 10.1109/ICRAIE.2014.6909170. DOI: https://doi.org/10.1109/ICRAIE.2014.6909170
T. Kashihara, Y. Araki, H. Yoshida, and K. Kobayashi, "Overmodulation Technique on Common Mode Voltage Reduction PWM Inverter using Saw-Wave Carrier Signal," 2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia), Himeji, Japan, 2022, pp. 741-745, doi: 10.23919/IPEC-Himeji2022-ECCE53331.2022.9807216. DOI: https://doi.org/10.23919/IPEC-Himeji2022-ECCE53331.2022.9807216
M. R. A. Pahlavani and Y. K. Vaneqi, “Optimization of space vector pulse width modulation switching algorithms for two-level inverters regarding different objective functions,” J. Basic Appl. Sci. Res., ISSN 2090-4304.
Y. S. Lai and F. S. Shyu, “Optimal common-mode voltage reduction PWM technique for inverter control with consideration of the dead-time effects. Part I: Basic development,” IEEE Trans. Ind. Appl., vol. 40, no. 6, pp. 1605–1612, Nov./Dec. 2004. DOI: https://doi.org/10.1109/TIA.2004.836149
H. H. Goh, X. Li, C. S. Lim, D. Zhang, W. Dai, T. A. Kurniawan, and K. C. Goh, “Common-mode voltage reduction algorithm for photovoltaic grid-connected inverters with virtual-vector model predictive control,” Electronics, vol. 10, no. 21, p. 2607, 2021, doi: 10.3390/electronics10212607. DOI: https://doi.org/10.3390/electronics10212607
M. R. Rusli et al., “Digital implementation of space vector PWM for three phase inverter with simplified C-block PSIM utilization,” in Proc. Int. Electron. Symp. (IES), Surabaya, Indonesia, 2021, pp. 24–29, doi: 10.1109/IES53407.2021.9593292. DOI: https://doi.org/10.1109/IES53407.2021.9593292
Downloads
Published
How to Cite
Issue
Section
Categories
License
Copyright (c) 2025 Journal of Technical Education Science
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.
Copyright © JTE.
