A Comparison of the Wishbone and Amba Axi Bus Architecture
Corressponding author's email:
18161299@student.hcmute.edu.vnDOI:
https://doi.org/10.54644/jte.71B.2022.1234Keywords:
System-on-Chip (SoC), IP Core, WISHBONE Bus, AMBA AXI bus, Bus ArchitectureAbstract
In the current trend of The Fourth Industrial Revolution, System-on-chip (SoC) design plays an important role in embedded systems and is a leading field of many industrial countries around the world. The rapid development of semiconductor technology makes it possible to integrate more and more components on a chip. Bus protocols were developed and used as a common interface for efficient interconnection of on-chip components, reducing complexity, energy consumption, and manufacturing costs. In this paper, we compare two popular bus architectures WISHBONE and AMBA AXI (Advanced Microcontroller Bus Architecture Advanced eXtensible Interface) based on the point-to-point connection system model by performing simulation and comparing their performance based on resource parameters, power consumption of each system. Specifically, the Point-to-Point connection model of both buses will use a MASTER interface which is a DMA (Direct Memory Access) connected to a SLAVE interface which is a RAM (Random Access Memory). These interfaces are IP cores that can be used and reused for different applications and purposes. The results are verified through simulation with the software Xilinx Vivado 2019.1.
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