A design of high-efficiency PWM/PFM buck converter with bypass mode using cmos 65nm

Abstract

This paper presents the design of high efficiency PWM/PFM Buck Converter with Bypass mode for battery-powered products. In this design, when the input voltage falls below 1.9V, the converter automatically enters Bypass mode. When input voltage rises upper 2.1V, the converter operates in PWM mode or PFM mode depending on load current. The conversion efficiency is over 85% with load current range from 2mA to 500mA. The structure in this paper also improves the capability of ZCD circuit, and eliminates the input referred offset voltage which helps to detect more accurately when the current of inductor goes to zero. Soft-start circuit also improves and merges with error amplifier to limit inrush current and avoid output voltage overshoot when power starts up. To obtain an accurate trip point to enable or disable the Buck converter, the implementation of Vdd detection circuit is based on a structure of bandgap circuit. This ensures that the trip point is as accurate as the bandgap reference voltage.